Descrição
CIRCUITO INTEGRADO DM81LS96AN DIP
DM81LS95A • DM81LS96A • DM81LS97A
3-STATE Octal Buffer
General Description
These devices provide eight, two-input buffers in each
package. All employ low-power-Schottky TTL technology.
One of the two inputs to each buffer is used as a control
line to gate the output into the high-impedance state, while
the other input passes the data through the buffer. The
DM81LS95A and DM81LS97A present true data at the outputs,
while the DM81LS96A is inverting. On the
DM81LS95A and DM81LS96A versions, all eight 3-STATE
enable lines are common, with access through a 2-input
NOR gate. On the DM81LS97A version, four buffers are
enabled from one common line, and the other four buffers
are enabled form another common line. In all cases the
outputs are placed in the 3-STATE condition by applying a
high logic level to the enable pins.
Features
n Typical power dissipation
DM81LS95A, DM81LS97A 80 mW
DM81LS96A 65 mW
n Typical propagation delay
DM81LS95A, DM81LS97A 15 ns
DM81LS96A 10 ns
n Low power-Schottky, 3-STATE technology
